This set of VHDL Multiple Choice Questions & Answers (MCQs) focuses on “Operators ”.

1. Which of the following is not an assignment operator?

a) <=

b) :=

c) =>**d) =**

.

2. A VARIABLE y is declared of STD_LOGIC_VECTOR type of 4 bits, if you want to assign 1001 to y, then what is the write assignment statement?

a) y <= “1001”**b) y := “1001”**

c) y <= ‘1’, ‘0’, ‘0’, ‘1’

d) y => “1001”

3. Refer to the VHDL code given below, which is the legal assignment statement?

SIGNALx: STD_LOGIC;SIGNALy: STD_LOGIC_VECTOR(3DOWNTO0);

**a) y <= (1 => ‘1’, OTHERS => ’0’);**

b) y := “0100”;

c) y => “0100”;

d) y => x;

4. Which of the following logical operator has the highest precedence?

a) NAND

b) NOR**c) NOT**

d) EXOR

5. In the following statements, y and z are equivalent to________

y <= NOT a AND b; z <= NOT (a AND b);

a) y <= a’+b’ and z <= (a.b)’

b) y <= (a+b)’ and z <= a’+b’**c) y <= a’+b and z <= a’+b’**

d) y <= a+b’ and z <= a.b

6. Which of the following VHDL statement is equivalent to NAND operation, if y, a and b are SIGNALS?

a) y <= NOT a AND b**b) y <= NOT a OR NOT b**

c) y <<= NOT a AND NOT b

d) y <<= NOT (a OR b)

7. ______ operator is unary as well as binary operator.**a) –**

b) *

c) /

d) **

8. The operator ‘&’ is called the_____ operator.

a) Logical AND operator

b) Bitwise AND operator

c) Arithmetic addition operator**d) Concatenation operator**

9. What is the type of result of MOD operator?

a) Numeric**b) Integer**

c) Array

d) Bit

10. The operators like =, /=, <, >, >= are called _________

a) Arithmetic operators

b) Concatenation operators

c) Logical operators**d) Relational operators**

11. What is the type of result for comparison operators?**a) Boolean**

b) Integer

c) Numeric

d) Array

12. ABS operator is used to _________

a) Shift the operand**b) Gives absolute value for the operand**

c) Give the result as nearest integer

d) To synthesize the result

13. Which of the following is exponentiation operator?

a) ^

b) *

c) /=**d) ****

14. SIGNAL x : STD_LOGIC; In this statement x is ______

a) Variable**b) Identifier**

c) Name

d) Literal

15. What is the use of shift operators?**a) To shift the data**

b) To shift the identifiers

c) To shift the operators

d) To shift the STD_LOGIC_VECTOR

16 What is the “SLL” operator?

a) Shift Logic Left

b) Shift Logically**c) Shift Left Logical**

d) Shift Left

17. The correct syntax for any logical shift operator like SLL and SRL is_____**a) bit_vector_operand <OPERATOR> integer_operand**

b) integer_operand <OPERATOR> bit_vector_operand

c) std_logic_operand <OPERATOR> integer_operand

d) integer_operand <OPERATOR> std_logic_operand

18. Refer to the VHDL code given below, what should be the output of the identifier ‘y’ and ‘z’?

VARIABLEx : BIT_VECTOR(3DOWNTO0) := 1010;VARIABLEy : BIT_VECTOR(3DOWNTO0) := 0000;VARIABLEz : BIT_VECTOR(3DOWNTO0) := 0000; … y := x SRL 2; z := x SLL 2; …

a) y = 0100 and z = 0100

b) y = 0010 and z = 0100

c) y = 0100 and z = 1000**d) y = 0010 and z = 1000**

19. In the following VHDL code, the values of y and z are _____

VARIABLEx : BIT_VECTOR(3DOWNTO0) := 1001;VARIABLEy : BIT_VECTOR(3DOWNTO0) := 0000;VARIABLEz : BIT_VECTOR(3DOWNTO0) := 0000; … y := x SRA 2; z := y SLA 2; …

a) y = 0000 and z = 0000

b) y = 1001 and z = 0000**c) y = 1110 and z = 0111**

d) y = 0111 and z = 1110

20. SLL operation is equivalent to which of the following operations?

a) Multiplication by any natural number**b) Multiplication by 2**

c) Division by 2

d) Exponential operation

21. Which of the following is equivalent division by 2 operator?**a) SRL**

b) SLL

c) SLA

d) SRA

22. In the VHDL code given below, what will be the values of y and z?

VARIABLEx : BIT_VECTOR(3DOWNTO0) := 1001;VARIABLEy : BIT_VECTOR(3DOWNTO0) := 0000;VARIABLEz : BIT_VECTOR(3DOWNTO0) := 0000; … y := x ROR 2; z := y ROL 2; …

a) y = 0100 and z = 0000

b) y = 0000 and z = 0000

c) y = 0111 and z = 1110**d) y = 0110 and z = 0110**

23. In a statement containing two or more operators of same precedence, how the expression will be solved?**a) Left to right**

b) Right to left

c) Alphabetically

d) In a random manner

24. What will be the values of the following variables after MOD operations?

x = 5 MOD 3; y = -5 MOD 3; z = 5 MOD -3;

a) x = 2, y = -2 and z = -2**b) x = 2, y = 1 and z = -2**

c) x= 2, y = -2 and z = 2

d) x = 2, y = -2 and z = 1

25. What will be the values of following variables after REM operations?

x = 5 REM 3; y = -5 REM 3; z = 5 REM -3;

a) x= 2, y = 1 and z = -2

b) x = 2, y = -2 and z = 1**c) x = 2, y = -2 and z = 2**

d) x = 2, y = 1 and z = 1

26. XNOR is a logical operator in VHDL.**a) True**b) False