Quine-McCluskey or Tabular Method of Minimization of Logic Functions MCQ’s

Digital Circuits Electronics & Communication Engineering

This set of Digital Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Quine-McCluskey or Tabular Method of Minimization of Logic Functions”.

1. In which of the following gates the output is 1 if and only if at least one input is 1?
a) AND
b) NOR
c) NAND
d) OR

2. The time required for a gate or inverter to change its state is called __________
a) Rise time
b) Decay time
c) Propagation time
d) Charging time

3. The output of an EX-NOR gate is 1. Which input combination is correct?
a) A = 1, B = 0
b) A = 0, B = 1
c) A = 0, B = 0
d) A = 0, B’ = 1

4. What is the minimum number of two input NAND gates used to perform the function of two input OR gates?
a) One
b) Two
c) Three
d) Four

5. The number of full and half adders are required to add 16-bit number is __________
a) 8 half adders, 8 full adders
b) 1 half adders, 15 full adders
c) 16 half adders, 0 full adders
d) 4 half adders, 12 full adders

6. Which of the following gate is known as coincidence detector?
a) AND gate
b) OR gate
c) NOR gate
d) NAND gate

7. Odd parity of word can be conveniently tested by ___________
a) OR gate
b) AND gate
c) NAND gate
d) XOR gate

8. Which of the following will give the sum of full adders as output?
a) Three point major circuit
b) Three bit parity checker
c) Three bit comparator
d) Three bit counter

9. An OR gate can be imagined as ____________
a) Switches connected in series
b) Switches connected in parallel
c) MOS transistor connected in series
d) BJT transistor connected in series

10. How many full adders are required to construct an m-bit parallel adder?
a) m/2
b) m
c) m-1
d) m+1

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