Risk and Dependability Analysis

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This set of Embedded Systems Multiple Choice Questions & Answers (MCQs) focuses on “Risk and Dependability Analysis”.

1. Which is a top-down method of analyzing risks?
a) FTA
b) FMEA
c) Hazards
d) Damages

2. What is FTA?
a) free tree analysis
b) fault tree analysis
c) fault top analysis
d) free top analysis

3. Which gate is used in the geometrical representation, if a single event causes hazards?
a) AND
b) NOT
c) NAND
d) OR

4. Which analysis uses the graphical representation of hazards?
a) Power model
b) FTA
c) FMEA
d) First power model

5. Which gate is used in the graphical representation, if several events cause hazard?
a) OR
b) NOT
c) AND
d) NAND

6. What is FMEA?
a) fast mode and effect analysis
b) front mode and effect analysis
c) false mode and effect analysis
d) failure mode and effect analysis

7. Which of the following can compute the exact number of clock cycles required to run an application?
a) layout model
b) coarse-grained model
c) fine-grained model
d) register-transaction model

8. Which model is capable of reflecting the bidirectional transfer of information?
a) switch-level model
b) gate level
c) layout model
d) circuit-level model

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