Signal Assignment

VHDL

This set of VHDL Multiple Choice Questions & Answers (MCQs) focuses on “Signal Assignment – 1”.

1. The signal assignment is considered as a ________
a) Concurrent statement
b) Sequential statement
c) Subprogram
d) Package declaration statement

2. How can we use an assignment statement as a sequential assignment?
a) By using keyword WAIT
b) By using a delay mechanism
c) By using conditional statements
d) By using it in any process

3. The sequential assignment statement is activated, whenever ________
a) The waveform associated changes its value
b) The process is terminated
c) The execution is scheduled
d) The value of the target is needed

4. The concurrent assignment statement is activated whenever ______
a) The execution is scheduled
b) The value of the target is needed
c) The waveform associated changes its value
d) The process is terminated

5. Which of the following is correct syntax for a signal assignment statement (if {} specifies an optional part)?
a) target <= {delay_mechanism} waveform;
b) target <= delay_mechanism waveform;
c) target <= delay_mechanism {waveform};
d) target <= {delay_mechanism} {waveform} value;

6. The conditional assignment statement is a _________ assignment.
a) Sequential
b) Concurrent
c) Selected
d) None of the above

7. Sequential assignments are synthesizable.
a) True
b) False

8. Delays are generally ignored in ________ assignments statements.
a) Concurrent
b) Conditional
c) Sequential
d) Selected

9. Which of the following can’t be a mode for target operand of assignment statement?
a) BUFFER
b) INOUT
c) OUT
d) IN

10. Which of the following is a variable assignment statement?
a) <=
b) :=
c) =>
d) ==

11. Which of the following is a keyword used for conditional assignment?
a) IF
b) WHEN
c) FOR
d) END

12. For a signal used in sequential assignment, it can have _______ driver(s).
a) 1
b) 2
c) 3
d) 4

13. The selected concurrent statement is equivalent to ________ sequential statement.
a) If else
b) Loop
c) Wait
d) Case

14. Those statement which are placed under ________ are concurrent.
a) Process
b) Function
c) Architecture
d) Procedure

15. In case of concurrent assignment, order of statements doesn’t matter.
a) True
b) False

16. Which of the following can’t be implemented with concurrent statements only?
a) Multiplexer
b) Decoder
c) Adder
d) Counter

17. Variable assignment statement executes in ______ time.
a) Immediately(zero)
b) After delay specified
c) After one clock cycle
d) After two clock cycles

18. In the signal assignment statement, which delay is used?

x <= 1 AFTER 10ns

a) Transport delay
b) Inertial delay
c) Delta delay
d) Wire delay

19. Inertial delay in Signal assignment is useful to ___________
a) Specify wire delay
b) Accumulate delay
c) Ignore input glitches
d) No use

20. Which of the following statement is a zero delay statement?
a) y <= x AFTER 10 ns
b) y <= TRANSPORT x AFTER 10 ns
c) y <= x
d) y := x AFTER 10 ns

21. Which of the following statement can’t be used to assign values in behavioral modeling of OR Gate?
a) Simple concurrent assignment
b) Sequential assignment
c) Conditional concurrent assignment
d) Selected concurrent assignment

22. Which of the following is not an assignment statement?
a) <=
b) :=
c) =>
d) :>

23. OTHERS keyword is used with which kind of assignment?
a) Concurrent
b) Sequential
c) Selected
d) Conditional

24. The following code represents which of the logic gates?

WITH ab SELECT 
y <= 1 WHEN “11”;0	WHEN OTHERS;

a) And gate
b) Or gate
c) Not gate
d) Nand gate

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