This set of VHDL Multiple Choice Questions & Answers (MCQs) focuses on “Synchronous and Asynchronous Reset”.
1. How many types of resets are there in hardware design?
2. In synchronous reset, reset is sampled with respect to _______
a) Enable signal
b) Data input signal
c) Clock signal
d) Output signal
3. Reset is a signal that is used for the initialization of the hardware.
4. Which of the following is an advantage of a synchronous reset?
a) It is slow
b) It requires a clock signal to reset the circuit
c) It filters the reset signal
d) It needs a stretched reset
5. Synchronous reset is a fast reset.
6. Designation used by a flip-flop for the reset is ________
8. Which of the following is NOT an advantage of asynchronous reset?
a) It is fast
b) It doesn’t require a clock signal to reset the circuit
c) Reset gets the highest priority
d) It may cause metastability
9. Asynchronous circuit is also called ________ circuit.
c) Clock circuit
10. Preset and clear are asynchronous inputs.