The mechanism of Interrupts

Embedded System

This set of Embedded Systems Multiple Choice Questions & Answers (MCQs) focuses on “The Mechanism of Interrupts”.

1. Which of the following uses clock edge to generate an interrupt?
a) edge triggered
b) level-triggered
c) software interrupt
d) nmi

2. In which interrupt, the trigger is dependent on the logic level?
a) edge triggered
b) level-triggered
c) software interrupt
d) nmi

3. At which point the processor will start to internally process the interrupt?
a) interrupt pointer
b) instruction pointer
c) instruction boundary
d) interrupt boundary

4. What does 80×86 use to hold essential data?
a) stack frame
b) register
c) internal register
d) flag register

5. What does the RISC processor use to hold the data?
a) flag register
b) accumulator
c) internal register
d) stack register

6. Which of the following is a stack-based processor?
a) MC68000
b) PowerPC
c) ARM
d) DEC Alpha

7. Which of the following is used to reduce the external memory cycle?
a) internal hardware stack
b) internal software stack
c) external software stack
d) internal register

8. How many interrupt levels are supported in the MC68000?
a) 2
b) 3
c) 4
d) 7

9. How many interrupt pins are used in MC68000?
a) 2
b) 3
c) 4
d) 5

10. Which priority encoder is used in MC68000?
a) 4-to-2 priority encoder
b) LS148 7-to-3
c) 2-to-4 priority encoder
d) LS148 3-to-7

11. Which of the following converts the seven external pins into a 3-bit binary code?
a) priority encoder
b) 4-to-2 priority encoder
c) LS148 7-to-3
d) 2-to-4 priority encoder

12. Which of the following ensures the recognition of the interrupt?
a) interrupt ready
b) interrupt acknowledge
c) interrupt terminal
d) interrupt start

13. Which of the following is raised to the interrupt level to prevent the multiple interrupt request?
a) internal interrupt mask
b) external interrupt mask
c) non-maskable interrupt
d) software interrupt

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